555 Timer Frequency & Pulse Tool
Calculate an oscillator’s frequency and high-time duty cycle, size a one-shot pulse, or find timing resistors for a target. Compare nominal results with component-tolerance limits before choosing parts.
Set your timing requirement
Standard 555 connections, with nominal ⅓ and ⅔ supply thresholds. No diode-assisted or control-voltage timing model.
Timing results
Nominal estimates, not a guaranteed timing specification or circuit approval.
Component values used
- RA
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- RB
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- Timing capacitor
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- Value basis
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- Frequency target / deviation
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- HIGH-duty target / deviation
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- Exact theoretical RA / RB
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Ideal steady-state waveform
RC-only timing range
- Frequency range
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- HIGH-duty range
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- HIGH-time range
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- LOW-time range
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These are independent component-tolerance corners, not a statistical interval. Different reported extremes may occur at different resistor combinations.
Before you build
Save component values, timing results, tolerances, and checks as a text file.
Three timing examples
Illustrative component combinations. Loading an example replaces the current inputs; you can then adjust values for your own circuit.
A near-1 kHz oscillator
RA = 10 kΩ, RB = 68 kΩ, C = 10 nF. The ideal result is about 988 Hz with a 53.42% HIGH duty cycle.
A roughly 100 ms pulse
R = 91 kΩ and C = 1 µF give about 99.97 ms. A ±10% capacitor already makes “100 ms” a range rather than an exact interval.
Size for 1 kHz at 60%
Fix C at 10 nF, solve both resistors, then choose E24 or E96 values. Compare the resulting frequency error and duty-cycle shift separately.
Two connections. Two timing behaviors.
Astable: repeating HIGH and LOW
tHIGH = ln(2) × (RA + RB) × C
tLOW = ln(2) × RB × C
Period = tHIGH + tLOW
Frequency = 1 / Period
DutyHIGH = (RA + RB) / (RA + 2RB)Monostable: one triggered pulse
Pulse width = ln(3) × R × C
R = target pulse width / (ln(3) × C)
ln(2) ≈ 0.693147
ln(3) ≈ 1.098612Standard timing model and operating guidance: TI NE555 / xx555 datasheet, §§5.3 and 6.3. The tool retains the full logarithms instead of the rounded 0.693 and 1.1 constants.
Frequency and duty must work together
Reverse sizing for an oscillator
D = target HIGH duty / 100
S = 1 / (ln(2) × fTARGET × C)
RA = (2D − 1) × S
RB = (1 − D) × SFor D = 0.50, RA becomes zero. Below 0.50, it becomes negative. Neither is a valid positive-RA design for this model. A different connection or a divide-by-two stage needs its own analysis.
Separate rounding from tolerance
Rounding changes the nominal setpoint. Tolerance adds a range around the chosen values. The tool reports both so a close nominal match is not mistaken for a guaranteed result.
For an oscillator, the slow corner uses maximum RA, RB, and C; the fast corner uses their minimum values. Duty has different corners: maximum RA with minimum RB gives the highest HIGH duty. C cancels from the ideal duty ratio.
What can change the measured timing?
The capacitor in service
A 1 µF label is not the same as 1 µF under every condition. Account for bias, temperature, leakage, and aging where relevant. For long delays, compare leakage against the small charging current near the threshold.
Fast timing and small resistors
Above 100 kHz, this tool flags the basic RC estimate for review, including CMOS versions. Internal delay, discharge resistance, and parasitic capacitance can matter; a faster-rated IC does not make the simple equation exact.
The output is not a power stage
The plotted HIGH and LOW levels are logical states, not guaranteed rail voltages. Choose a suitable buffer or switching stage for a demanding load and check its voltage, current, and transient requirements separately.
For CMOS-device timing corrections and grade-dependent supply limits, see the TI TLC555 datasheet, §§5.3 and 6.3.2. TLC555C is specified from 2–15 V, TLC555I from 3–15 V, and TLC555M/Q from 5–15 V. Those ranges are not a universal specification for every 555.
555 timer questions
Why does changing VCC not change the calculated frequency?
The ideal capacitor thresholds scale with VCC, so their ratios cancel in the timing equations. This is a property of the model, not a claim that a real timer has zero supply sensitivity. Changing VCC still affects the device-range check, capacitor voltage, and discharge-current estimate.
Can this calculate a diode-based PWM circuit?
No. A steering diode changes the charge path and introduces a forward-voltage effect. Do not use the standard two-resistor result as a diode-PWM result. The tool also excludes externally driven CONT, output-feedback oscillators, and retriggerable circuit variants.
Is the monostable frequency equal to one divided by pulse width?
No. Pulse width describes the HIGH interval, not the time between triggers. Repetition rate and average duty depend on the external trigger and recovery behavior; they cannot be inferred from R and C alone.
Does the tolerance range include the timer IC?
No. It covers only the independent resistor and capacitor tolerances entered. Treat it as the RC contribution to your error budget, then add the selected device’s timing variation and other circuit effects using a suitable worst-case analysis.
Will the first oscillator pulse equal the steady-state HIGH time?
Not necessarily. This waveform begins with C already at ⅓ VCC. Starting from a fully discharged capacitor gives a different initial charging interval, and actual power-up also depends on reset and supply behavior. Startup is not modeled here.
What should I send when sourcing timer components?
Include the complete timer part number and package, operating voltage and temperature, resistor values and tolerances, capacitor dielectric and effective-capacitance needs, quantity, and required delivery date. A timing target alone does not identify an interchangeable part.
Source the parts behind your timing circuit
Send your selected timer, resistors, capacitors, or complete BOM. YURUNOX can review sourcing requirements, quantity, and delivery needs for the exact parts.
