Inverting Op-Amp Resistor Calculator
Analyze known input and feedback resistors, or size one resistor from a target inverting gain. Then check reference bias, output range, input common mode, resistor tolerance, first-order op-amp error, current, power, and resistor-only thermal noise.
Define the gain network
The calculator uses an ideal closed-loop inverting topology, then adds conservative independent error bounds. Example values are not component specifications.
Gain and operating results
Use a preset to explore the model, then replace every value with limits from the actual circuit and datasheets.
Design checks
At the input test point
Input-to-output reference
| VIN | Nominal VOUT | Conservative VOUT interval | Input current |
|---|
Mathematical closed-loop demands are shown even if an output is outside the entered linear range. Real hardware clips or loses linear operation; it does not produce an unlimited calculated voltage.
The summary records inputs, resistor selection, modeled ranges, checks, and assumptions.
The summing node follows VREF—not always ground
In linear closed-loop operation, the inverting input is held close to the non-inverting reference. The source therefore drives Rin relative to VREF, while Rf returns current from the output.
Ideal transfer function
G = Rf / Rin
AV = −G
VOUT = VREF − G × (VIN − VREF)
Noise gain = 1 + GWhen VREF is 0 V, the familiar result is VOUT = −VIN × Rf/Rin. With a nonzero reference, the reference term is amplified by the noise gain; it cannot be treated as a simple output offset.
First-order bounds used here
Gmin = Rf(1 − tf) / Rin(1 + tin)
Gmax = Rf(1 + tf) / Rin(1 − tin)
Eop ≤ |VOS|(1 + Gmax) + |IB−|Rf,max + |IB+|RREF(1 + Gmax)The calculator sums independent absolute bounds to form a conservative envelope. It does not claim a statistical distribution or account for cancellation.
Technical references: Analog Devices on single-supply inverting stages, signal gain versus noise gain, and input-bias-current compensation limits.
The same gain can behave differently with different resistor values
A 1 kΩ / 10 kΩ pair and a 100 kΩ / 1 MΩ pair both produce a nominal gain of −10 V/V, but they place very different demands on the source, bias-current error, noise, output current, parasitic capacitance, and resistor power.
Lower resistance
Reduces resistor thermal noise and bias-current error, and often makes parasitic capacitance less influential. It increases source loading and feedback current, so confirm source drive and op-amp output-current capability.
Higher resistance
Reduces loading and current consumption, but increases resistor noise, bias-current error, leakage sensitivity, and interaction with input and PCB capacitance. Very high impedance nodes require clean layout and controlled leakage.
Matched ratio or discrete pair
A ratio-matched network may hold gain ratio better than two unrelated resistor tolerances. Check ratio tolerance, ratio temperature coefficient, tracking, voltage coefficient, package stress, and absolute resistance—not only the printed tolerance.
Confirm linear range, dynamics, and stability separately
This page checks DC gain-setting and several first-order limits. A complete design still needs the actual op amp, supply, source, load, frequency, PCB, and environmental conditions.
Operating limits not simulated
- Output swing and drive: use guaranteed limits for load current, supply, and temperature.
- Input common mode: VREF must remain inside the valid range; rail behavior varies by device.
- Bandwidth and slew rate: noise gain, closed-loop response, large-signal amplitude, and compensation all matter.
- Stability: capacitive source, feedback, load, and PCB parasitics can require a different network.
Reference and error questions
- VREF impedance: buffer or decouple the reference as its AC and DC load require.
- Bias-current balance: Rin ∥ Rf is a classic starting value for the non-inverting source resistance only when the device architecture and bias-current behavior support that assumption.
- Protection: source faults can drive current through Rin and input protection structures even when the output is saturated or unpowered.
- Accuracy: include drift, noise bandwidth, common-mode rejection, supply rejection, resistor tracking, calibration, and ADC errors as applicable.
Inverting op-amp resistor questions
Why is noise gain positive when signal gain is negative?
The input signal enters through Rin, giving a closed-loop signal gain of −Rf/Rin. Op-amp input voltage noise and input offset act like a non-inverting input disturbance, so their closed-loop gain is 1 + Rf/Rin. Stability and approximate bandwidth are therefore tied to noise gain, not the signed signal gain alone.
Can I connect VREF directly to a resistor divider?
Sometimes, but the divider’s Thevenin resistance, bypassing, bias-current error, noise, startup behavior, and ability to absorb dynamic current must be checked. A buffer or a lower-impedance reference may be required. This calculator lets you enter the reference source resistance for a first-order bias-current bound.
Should I always add Rin ∥ Rf in series with the non-inverting input?
No. That classic balance resistor can reduce error when the two input bias currents are sufficiently matched, but modern FET-input or bias-cancelled amplifiers may behave differently. Extra resistance can also add noise. Follow the selected op amp’s datasheet and application guidance.
Does the calculator predict clipping?
It compares the requested mathematical output envelope with the limits you enter. If the demand crosses a limit, real hardware may saturate, distort, recover slowly, or activate internal protection. The displayed transfer equation is no longer a valid linear prediction during clipping.
Is an E24 or E96 result guaranteed to be purchasable?
No. Preferred-number selection is mathematical only. Confirm the exact resistance, tolerance, temperature coefficient, package, power, voltage rating, pulse behavior, manufacturer, lifecycle, and stock condition for the order.
Send the resistor, op-amp, or BOM requirement for sourcing review
Include the full part number or electrical requirement, quantity, package, tolerance, temperature range, target date, destination, and any evidence required before release.