YURUNOX / IC thermal design guide

Junction vs Ambient Temperature in ICs: Estimate Tj Correctly

The air around an IC can remain within its stated range while the silicon junction runs too hot. This guide shows how to separate temperature locations, calculate actual device dissipation, choose a thermal parameter that fits the board, and validate the estimate before component approval.

By YURUNOX · For hardware engineers and technical buyers
Sources checked September 5, 2026 · About 17 minutes

Opened integrated circuit showing the semiconductor die, bond wires and surrounding package connections
The die is inside the package. Its temperature is not the same measurement as the package surface or the surrounding air. Photo: Mister rf, Wikimedia Commons, CC BY-SA 4.0. Unmodified.

What Is the Difference Between Junction and Ambient Temperature?

Junction temperature, Tj, refers to the semiconductor die inside an integrated circuit. Ambient temperature, Ta, refers to air at a defined environmental reference point. Electrical losses normally raise the powered junction above ambient. An acceptable air temperature alone does not prove acceptable junction temperature.

Name the location. Die, package top, board and air temperatures are different quantities.

Use device loss. Power delivered to the load is not power dissipated inside the IC.

Match the model. A catalog θJA is not a universal constant for every PCB and enclosure.

Use the right limit. Recommended operation, absolute maximum stress and thermal shutdown have different purposes.

“The chip is at 80 °C” is incomplete. Was that an internal sensor reading, an infrared measurement of the molded top, a thermocouple on a heatsink, or air near the board? The answer determines what you can calculate next.

Swipe horizontally to compare temperature locations.

Four temperatures to keep separate
SymbolLocationWhat it helps you decide
Tj: junctionThe semiconductor die; the defined point or reported value may be device-specific.Whether the IC is within its applicable internal operating limits.
Ta: ambientAir at the reference location used by the test or thermal model.The environmental starting point for an ambient-based estimate.
TC or TT: case / topA specified case surface; TT commonly identifies the package-top measurement.Whether a supported surface-to-junction estimation method can be used.
TB: boardA specified point on the printed circuit board near the device.Board-based estimation or comparison with a thermal model.

Ambient is not automatically room temperature

A room, enclosure inlet and pocket of air near a regulator can be at different temperatures. Use the ambient reference that belongs to your model, and document where the probe sits. Do not combine room temperature with a thermal relationship characterized against a different reference.

Temperature can also vary across a die. Internal telemetry may describe one sensor location rather than the hottest point everywhere on the chip. Read the manufacturer's sensing definition, accuracy and interpretation before treating telemetry as a complete temperature map.

02 / Match the parameter to the question

Which Thermal Parameter Should You Use?

Heat leaves the die through several paths: package connections and the PCB, package surfaces, and any designed interface to a heatsink or chassis. The division of heat between those paths changes with the assembly.

Steady-state estimate:
Tj ≈ Ta + PD × θJA,effective

PD is device dissipation in watts. A thermal resistance in °C/W converts that power into a temperature rise. For temperature differences, 1 °C equals 1 K. Here, “effective” means a value appropriate to the assembly and boundary conditions, not simply a number copied from any package table.

Swipe horizontally to compare the thermal parameters.

Same units, different jobs
ParameterIntended relationshipImportant limitation
θJA or RθJAJunction to ambient under stated board and environmental conditions.PCB copper, mounting and airflow can change the applicable value.
θJCJunction to a specified case surface under a controlled heat-flow test.Total device power does not necessarily flow through that surface in your application.
ψJTJunction-to-top characterization using total device dissipation.Not a true isolated-path resistance; requires the correct top location and suitable conditions.
ψJBJunction-to-board characterization.Needs the specified board measurement point and an applicable configuration.

TI's Semiconductor and IC Package Thermal Metrics explains the test-condition dependence of θJA and why ψJT is a characterization parameter. Identical °C/W units do not make the values interchangeable.

Two shortcuts to avoid: do not add θJC to θJA, and do not automatically add PDθJC(top) to a measured package-top temperature. Both can mix incompatible heat-flow assumptions. A heatsink analysis needs a consistent thermal network.
03 / Published bench evidence

How Much Can the Same IC's Thermal Result Change With the Board?

Analog Devices test / Not a YURUNOX test

MAX25255 evaluation-board example

In a June 2025 article, Analog Devices reported θJA values of 27.2 °C/W on a four-layer JEDEC board and 18.5 °C/W on its four-layer evaluation kit.

The reported test used 12 V input, 3.3 V output, 8 A load, 2.1 MHz switching and 25 °C ambient. With 1.7 W of IC loss, the evaluation-board estimate was 56.45 °C; the device's TEMP-pin reading was 57.3 °C.

25 + (1.7 × 18.5) = 56.45 °C

For comparison, inserting the article's JEDEC-board value into the same calculation gives 71.24 °C. That is our arithmetic comparison, not a second measured result.

Practical lesson: retaining the board-specific coefficient matters. The agreement in this test does not establish a universal error bound for other boards, loads or measurement setups.

Source: Ankul Gupta, How to Accurately Estimate IC Junction Temperature, Table 2 and Case 1.

04 / Start with the electrical boundary

How Do You Calculate the IC's Actual Power Dissipation?

Power entering a circuit, power reaching its load, and heat generated inside one IC are not the same thing. Draw the boundary around the device whose junction temperature you want to estimate.

Linear regulator: voltage drop becomes heat

For a simple low-dropout (LDO) linear regulator, a useful steady-state balance is:

PD ≈ (VIN − VOUT) × IOUT
+ VIN × IGND

IGND is the ground or internal operating current for this simplified model. Check the topology, extra pins and datasheet definitions. Neglect it only when justified relative to the other loss. TI's TPS7A20 datasheet discusses regulator power dissipation and thermal implementation.

Switching converter: stage loss is not necessarily IC loss

A hypothetical 10 W output stage at 90% efficiency has total loss of 10 ÷ 0.90 − 10 = 1.11 W. Some of that can be in the inductor, external switches, resistors or PCB. Assigning all 1.11 W to the controller or converter die without checking the loss allocation can distort the temperature estimate.

Digital and interface ICs: use the actual operating mode

Clock activity, output loading, bus state and enabled functions affect losses. A standby-current number is a poor substitute for a continuously active workload. Analog Devices AN-1179 provides interface-device examples in which loading and supply-current assumptions are part of the calculation.

05 / A warm enclosure changes the budget

How Does Ambient Temperature Change the Junction-Temperature Budget?

Illustrative model, not measured product performance: a hypothetical regulator converts 5.0 V to 3.3 V at 0.30 A. Neglect ground current and assume an effective θJA of 80 °C/W for the modeled assembly. These are not TPS7A20 thermal specifications.

  1. Electrical loss0.51 W(5.0 − 3.3) × 0.30. The separate load receives 0.99 W.
  2. Temperature rise40.8 °C0.51 W × 80 °C/W under the assumed steady-state model.
  3. Junction estimateAmbient + 40.8 °CThe same loss leaves less headroom as the environment warms.

Swipe horizontally to compare the three conditions.

Fixed loss and assumed thermal resistance; hypothetical 110 °C project target
Ambient TaEstimated TjTarget minus estimateInterpretation
25 °C65.8 °C+44.2 °CA room-temperature result is not the hot-enclosure result.
60 °C100.8 °C+9.2 °CModel headroom remains; uncertainty still needs assessment.
85 °C125.8 °C−15.8 °CThe estimate exceeds this project's assumed target.

Turn the junction target into a power budget

Modeled power budget =
(Tj,target − Ta) ÷ θJA,effective

At 60 °C ambient, the example budget is 0.625 W. At 85 °C, it falls to 0.3125 W. The 0.51 W regulator fits the first modeled budget but exceeds the second.

Keeping 0.51 W below the 110 °C target at 85 °C ambient would require an effective resistance below about 49.02 °C/W, or lower dissipation or a cooler environment. That does not prove a larger package or a few extra vias will achieve the required change.

The 110 °C target is a hypothetical project choice, not a universal IC limit or prescribed margin. Real losses and heat transfer can vary with temperature. Validate the model, uncertainty and every applicable operating limit.
06 / Explore the trade-off

When Is a Steady-State Junction-Temperature Calculator Useful?

Try the steady-state planning tool

Enter device loss and an assembly-appropriate effective thermal resistance. The result is an estimate, not a validated temperature, a transient model or an operating approval.

Modeled junction temperature
100.8 °C
Modeled rise above ambient
40.8 °C
Target minus estimated junction
9.2 °C
Power budget to reach the target
0.625 W

The estimate is below the chosen target. This is model headroom, not a guarantee of operating margin.

At this power and ambient, the target corresponds to an effective resistance of 98.039 °C/W or less.

Assumptions: constant power, steady state, linear effective thermal relationship and matching boundary conditions. Nearby heat sources must be represented in the chosen model. This tool does not check cold-start limits, voltage/current ratings, uncertainty, thermal runaway or protection thresholds.

07 / Read the exact package and rating

How Do Package and Temperature Limits Change the Decision?

Package suffixes affect more than footprint. For example, the TPS7A20 thermal table lists the following values for two packages.

Swipe horizontally to compare package metrics.

Published TPS7A20 values, Rev. H, section 5.4
PackageθJAψJT
DBV / 5-pin SOT-23187.1 °C/W27.1 °C/W
DQN / 4-pin X2SON166.1 °C/W3.0 °C/W

The values describe the stated thermal-test context, not a guaranteed resistance for your product. These packages are not footprint-compatible substitutes. The different ψJT values also show why a surface-to-junction correction must match the package. Source: TI TPS7A20 datasheet.

Recommended operation is not the shutdown threshold

Separate published example / TI LM5164
Upper recommended junction temperature
150 °C
Typical thermal-shutdown threshold
175 °C

The LM5164 datasheet, Rev. D, gives these numbers different roles. The shutdown threshold does not extend the recommended operating range to 175 °C. LM5164 and TPS7A20 illustrate different questions; they are not being proposed as alternatives.

  • Recommended operating conditions: the intended operating envelope, together with the applicable electrical-characteristic conditions.
  • Absolute maximum ratings: stress limits, not a promise of normal operation at those limits.
  • Storage temperature: not authorization for powered operation.
  • Thermal shutdown: an overload response, not a normal temperature-control target.

Analog Devices' datasheet guidance explains the distinction between stress limits and operation. Check whether each temperature range is stated as Ta or Tj, and respect its low-temperature end too. Self-heating does not establish cold-start capability below the permitted range.

08 / Surface temperature is evidence, not the answer by itself

Can a Package-Top or Thermal-Camera Reading Estimate Junction Temperature?

Yes, when the device offers a suitable characterization parameter and the measurement follows the applicable method. For an appropriate assembly without a top-mounted heatsink:

Tj ≈ TT + ψJT × PD

TT is measured at the defined package-top location, often the top center. PD is total device dissipation used by this characterization method; the formula does not claim that all heat exits through the top.

Illustrative calculation: an 80 °C top reading, 0.50 W dissipation and applicable ψJT of 2 °C/W give an estimated junction temperature of 81 °C. The 1 °C correction is not a ±1 °C accuracy statement. Probe error, placement, power uncertainty and parameter applicability remain.

A thermal image shows visible surfaces

Published infrared image of a powered printed circuit board with a color scale showing visible surface temperatures
Measured PCB thermogram from Zhang and Chen's four-layer-board study, Load A. It maps visible surface temperatures; it is not a direct image of junction temperatures inside encapsulated ICs. Yabin Zhang and Lin Chen (2024), PLOS ONE, Figure 18, CC BY 4.0. Unmodified.

An infrared camera does not normally see through the encapsulation to measure the die. Its reading depends on surface emissivity, reflected radiation and measurement geometry. A small target must also occupy enough of the instrument's measurement area. A color map alone is not a calibrated junction measurement.

FLIR's thermographic measurement guidance explains emissivity and reflected apparent temperature. Shiny metal and molded plastic need different consideration; do not assume one setting gives equally reliable readings on both.

A thermocouple has different pitfalls. Contact and attachment affect the reading, and its wires can carry heat away from a small package. Use the manufacturer's measurement guidance and record the location and attachment method.

Aluminium computer heatsink with multiple fins
A heatsink adds a thermal path and changes the measurement problem. Photo: Huha, Wikimedia Commons, CC BY-SA 3.0. Unmodified.

Do not carry the same ψJT into a heatsink design

TI explicitly cautions against using ψJT when a heatsink is applied. Use an appropriate thermal network and defined interface measurements instead.

Measuring the heatsink is not the same as measuring the case beneath it. The interface and the heat split between the board and top path matter. See TI SPRA953D, sections 2 and 3.

09 / Time is part of the specification

When Do Short Pulses Need a Transient Thermal Model?

Steady-state resistance describes an eventual temperature relationship. It does not describe the complete response to a burst of activity. A short pulse and a continuous load of the same amplitude can produce different temperature rises; repeated pulses can build on heat left by earlier ones.

Transient thermal impedance, Zθ(t), describes the time-dependent response for a specified thermal path and boundary condition. Use the device's applicable transient curve or model, along with pulse duration, repetition and initial thermal state.

Nexperia AN11156, Using Power MOSFET Zth Curves, demonstrates single-pulse, composite-waveform and pulse-burst analysis. Its numerical MOSFET curves are not transferable to an unrelated IC package.

Two opposite errors are possible. Long-term average power can hide peak junction temperature. Multiplying an isolated, very brief peak by steady-state resistance can overestimate that pulse's rise. Select the model by the workload's time scale.
10 / Make the conclusion reproducible

How Should You Validate Junction Temperature in the Final Assembly?

  1. Record the exact IC and package.Capture the recommended temperature range, electrical conditions, thermal-data revision and relevant package suffix.
  2. Define the loss cases.Estimate dissipation at input extremes, realistic output loading, activity modes and sustained or pulsed workloads.
  3. Document the environment.Record PCB stack-up, copper, enclosure, orientation, airflow, mounting and ambient-reference location.
  4. Choose a supported estimation method.Use an applicable model, defined surface or board measurements, or supported internal telemetry. Record the method's limitations.
  5. Test the important steady and transient conditions.Allow sustained loads to settle; capture bursts with adequate timing. Include nearby heat sources and justified cooling-degradation cases.
  6. Compare against a documented target.Account for model and measurement uncertainty. Revalidate after meaningful package, layout, cooling or firmware changes.

For exposed-pad packages, implementation matters: pad attachment, board copper and thermal vias form part of the heat-removal path. TI's PowerPAD guidance explains their roles. Follow the exact device's electrical connection requirements; an exposed thermal pad is not universally a ground pad.

Illustrative troubleshooting scenario / Not a customer result

The controller passes on the bench, then resets in its enclosure

A controller operates on an open bench but resets after sustained enclosed operation. Overtemperature is one possibility, not a diagnosis. Supply instability, software faults and other components can produce similar symptoms.

Record workload, local air temperature, package temperatures and supply behavior together. Check whether supported junction estimates approach the relevant limits. If the evidence supports a thermal cause, investigate loss, board heat spreading, airflow and neighboring heat sources before assuming the IC must be replaced.

After any change, repeat the enclosed test under the same conditions. A cooler-looking surface alone does not establish that the original failure mode is resolved.

11 / Keep thermal assumptions in the approval

What Thermal Evidence Should a Buyer Include in an RFQ?

For a request for quotation (RFQ) or alternate-part review, describe the operating problem rather than asking for a “cooler-running” IC.

  • Electrical duty: exact part or function, supply range, output loading, activity profile and estimated IC loss.
  • Mechanical constraints: package, footprint, height, PCB stack-up, available copper and exposed-pad attachment.
  • Environment: maximum relevant ambient temperature, its reference location, enclosure and airflow.
  • Thermal target: applicable junction range, project target, uncertainty allowance and available cooling paths.
  • Required evidence: package-specific thermal data, test conditions, typical versus guaranteed figures, recommended layout and validation requirements.
Illustrative inquiry wording
“Please compare the proposed part in its exact package for our stated supply, load and workload. The board operates inside an enclosure with a defined maximum ambient reference. Include device-loss assumptions, the applicable junction limits and thermal-data test conditions. Identify layout or cooling changes and the evidence needed before approving substitution.”

A matching function or output-current rating does not prove thermal equivalence. Keep package and thermal evidence with your part-approval record. See YURUNOX's quality assurance information, or explore Texas Instruments components and Analog Devices components.

Bring the operating conditions into your sourcing inquiry

Send YURUNOX the manufacturer part number, package, quantity and relevant supply, load and temperature requirements. Include PCB and cooling constraints when evaluating alternatives.

YURUNOX is an electronic-component sourcing partner. Thermal suitability and system performance require engineering review and validation.

Sources and further reading

The named device examples are published manufacturer data. The regulator, surface-correction and troubleshooting scenarios are illustrative, not YURUNOX measurements or customer results.

  1. Texas Instruments: Semiconductor and IC Package Thermal Metrics, SPRA953DDefinitions, test conditions and limitations of thermal parameters; March 2024 revision.
  2. Analog Devices: How to Accurately Estimate IC Junction TemperatureAnkul Gupta, June 2025; MAX25255 board-specific parameters and bench comparison.
  3. Texas Instruments: TPS7A20 datasheet, Rev. HPackage thermal metrics and LDO power dissipation.
  4. Texas Instruments: LM5164 datasheet, Rev. DRecommended junction-temperature conditions and typical thermal shutdown; February 2026 revision.
  5. Analog Devices AN-1179: Junction Temperature Calculation for Interface TransceiversLoss calculations that account for device loading and operating mode.
  6. Nexperia AN11156: Using Power MOSFET Zth CurvesTransient methods for pulses and composite waveforms.
  7. Texas Instruments: PowerPAD Thermally Enhanced Package, SLMA002HExposed-pad assembly, copper and thermal-via guidance.
  8. FLIR: Thermographic measurement techniquesSurface emissivity and reflected-radiation considerations.
  9. Zhang and Chen: Four-layer printed-circuit-board thermal modelingPLOS ONE, 2024; source of the measured thermogram reproduced as Figure 18.

Image sources and licenses appear beside the figures. Confirm the current documentation for the exact ordering code before component approval.

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