STM32F103C8T6 vs STM32F103CBT6
The main difference is guaranteed Flash capacity: 64 KB for C8T6 and 128 KB for CBT6. Both offer 20 KB SRAM, a Cortex-M3 core running at up to 72 MHz, and the same LQFP48 package and pinout. CB gives your firmware more storage—not more RAM or a faster processor.
Should you choose STM32F103C8T6 or STM32F103CBT6?
Compare the complete memory plan, not just the application file. A custom bootloader, saved parameters and an update image can consume space that a headline firmware-size figure leaves out.
All programmed regions, reserved pages and planned growth fit inside 64 KB. Keep a validated C8 design when the approved feature plan needs no extra Flash; compare like-for-like quotations before changing the BOM.
Your complete budget is above 64 KB but no more than 128 KB, or the approved roadmap justifies more storage. Validate the CB layout and keep the unchanged 20 KB SRAM limit in view.
A RAM shortage, insufficient CPU throughput, a missing peripheral or a budget above 128 KB. Those problems need a separate design review, not just an 8-to-B suffix change.
STM32F103C8T6 vs STM32F103CBT6: specification comparison
The capacity difference is Flash, not SRAM, CPU speed or package. This table compares the exact T6 variants. Do not extend this comparison to a different package or temperature suffix just because the first part of the number looks familiar.
Swipe the table sideways to see all columns →
| Check | STM32F103C8T6 | STM32F103CBT6 | Practical effect |
|---|---|---|---|
| Main Flash | 64 KB | 128 KB | CB provides 64 KB more program/data storage. |
| SRAM | 20 KB | 20 KB | No extra stack, heap or live-buffer capacity. |
| Core / maximum clock | Arm Cortex-M3 / 72 MHz | Arm Cortex-M3 / 72 MHz | No clock-speed upgrade. |
| Package / body | LQFP48 / 7 × 7 mm | LQFP48 / 7 × 7 mm | Same package and pinout for these variants. |
| Operating supply | 2.0–3.6 V | 2.0–3.6 V | Check the actual board's supply and I/O conditions. |
| T6 temperature grade | −40 to +85 °C ambient | −40 to +85 °C ambient | A T7 offer is a separate ordering option. |
| Main-Flash erase page | 1 KB | 1 KB | Reserve whole pages for independently erased data. |
| Main-Flash address range | 0x08000000–0x0800FFFF | 0x08000000–0x0801FFFF | End addresses are inclusive. |
Sources: ST DS5319 datasheet, device overview and ordering information; PM0075, medium-density Flash organization.
Shared Flash scale: 0–128 KB. SRAM is a separate memory: 20 KB on both devices. The striped area is not an approved C8 storage region.
What do the C8T6 and CBT6 suffixes mean?
- C
- 48 pins. This is not the Flash-density field.
- 8 / B
- 64 KB / 128 KB Flash, respectively.
- T
- LQFP package. A U package code is not the same PCB footprint.
- 6
- −40 to +85 °C temperature grade.
- TR
- An additional tape-and-reel ordering suffix; confirm the complete quoted part number and delivered packing.
ST's ordering scheme in DS5319 defines these fields. Packing requirements belong on the purchase order even when a short BOM description omits them.
Can you safely use 128 KB on an STM32F103C8T6?
No—not as a guaranteed production capability. C8 is specified for 64 KB; changing a linker limit does not change that rating. The following is a public ST support exchange, not a YURUNOX customer story or an in-house test. Its value is the manufacturer clarification behind a common purchasing mistake.
What ST clarified about CubeIDE's Flash setting
A developer asked whether changing STM32CubeIDE's linker Flash size from 64 KB to 128 KB was enough for an STM32F103C8T6 project. In the accepted answer, Peter Bensch clarified that the IDE's 64 KB setting matched C8, while the specified 128 KB variant was STM32F103CBT6.
Read the original question and accepted ST answer. Later user reports in the thread do not change the datasheet rating.
How much Flash does your complete firmware need?
Use the complete programmed image, including constants and Flash-resident initialization data—not only the code section. Then account for separate boot, data and update regions without counting the same bytes twice.
Use the linker map and programming addresses. Check code, constants and the Flash load copy of initialized data. Count each stored region once, including padding and image metadata; assess runtime data, stack and heap separately against SRAM. A file-size figure alone does not show where those bytes will be programmed.
Illustrative engineering budget, not a measured customer project: the current 60 KiB layout fits C8 with 4 KiB left. Add an 8 KiB growth allowance and it exceeds C8 by 4 KiB. CB has 60 KiB remaining after that allowance.
This budget exceeds C8. It fits within CB's capacity; validate the actual address layout and update process.
Capacity planning only: this does not check SRAM, linker addresses, image validity, endurance, write protection or power-loss recovery. A factory system-memory bootloader and option bytes are outside the main-Flash budget; a custom bootloader stored in main Flash is not.
Address check, using a separate illustrative example: a 60 KiB application loaded after an 8 KiB bootloader begins at 0x08002000 and ends at 0x08010FFF (inclusive). Although the application is smaller than 64 KiB, it extends beyond C8's 0x0800FFFF limit. Check start address + length in bytes − 1 for every programmed region, and confirm reserved pages neither overlap nor fall outside the device.
How much Flash should you reserve for saved settings?
Reserve space for the storage method, not just the value bytes. For ST's two-page EEPROM-emulation example, these devices need at least 2 KiB of Flash allocation; metadata and record handling reduce the usable payload.
Why EEPROM emulation reserves two pages
ST's AN2594 describes emulating EEPROM with at least two equal-size Flash pages and a page-status scheme for moving data between them. On these medium-density parts, two 1 KiB pages occupy 2 KiB of main Flash. That is an allocation, not 2 KiB of usable parameter payload.
Record overhead, update frequency, endurance and interrupted-write recovery still need evaluation. AN2594 is a documented design reference, not proof that an unreviewed implementation is ready for your product.
Sources: AN2594, section 2.1 and PM0075, medium-density page organization.
What changes when you move the saved-data pages?
Suppose a C8 product stores calibration in its final two pages. Expanding the linker region for CB can make those old addresses available to application code unless they remain explicitly excluded.
If a new release instead stores data at CB's final two pages, it also needs a migration plan. Define how it recognizes the old format, preserves the values and handles an interrupted transfer. A later downgrade must not assume the old layout still exists.
0x0800F8000x0800FC002 KiB reserved at the 64 KiB boundary0x0801F8000x0801FC002 KiB reserved at the 128 KiB boundaryCan C8T6 and CBT6 replace each other?
Yes, they are replacement candidates for the same package and pinout, but approval is directional. C8-to-CB can retain a validated smaller-memory layout; CB-to-C8 requires every programmed and reserved region to fit within 64 KB. Neither direction is automatically qualified for your product.
Replacing C8T6 with CBT6
A C8 image using only common resources and the original address layout can be a starting point on CB. A different density does not inherently require changing the board.
- Make the BOM, build target and programming job agree on the approved device; a linker change alone is not a device approval.
- Review hard-coded Flash ends, erase ranges, boot checks and parameter addresses.
- When using extra capacity, release the updated linker map and image together.
- Validate normal operation, updates, recovery and retained data on the offered material.
Replacing CBT6 with C8T6
Treat this as a capacity reduction. “The binary is under 64 KB” is not enough if it starts above the Flash base or depends on data at a higher address.
- Confirm every programmed region and reserved page lies inside
0x08000000–0x0800FFFF, with no overlaps. - Rebuild or requalify the complete smaller-memory layout, including bootloader offsets.
- Check update packages and any rollback image—not only a clean factory install.
- Do not approve C8 as an alternate while a CB-only firmware release remains in use.
Can you program these STM32F103 devices over USB?
Not through a factory USB DFU bootloader on these variants. ST's AN2606 lists USART1 for their factory system-memory bootloader. USB firmware loading requires an appropriate custom bootloader; a USB connector alone does not establish that capability.
If your development board accepts firmware over USB, determine which software provides that function. A custom USB bootloader stored in main Flash consumes part of the 64 KB or 128 KB budget and may change the application start address.
For production, record the programming interface, boot-entry conditions, image address, erase policy and recovery access. Changing C8 to CB does not define those choices for you.
Source: AN2606 Rev 70, STM32F10xxx devices, Table 45. Other STM32 subfamilies have different system-bootloader interfaces.
What should buyers verify before approving a quote?
Do not compare two quotations until the full part number, packing, condition and acceptance requirements match. A lower unit price is not useful if the offered device cannot support the released memory layout.
- Freeze the exact requirement
Record C8T6 or CBT6, quantity, packing format, delivery need and written alternate policy. Keep the original requirement visible when requesting a CB alternative to C8.
- Connect evidence to the lot
Request readable package and original-label photographs, source documentation and the association between supplied quantity and lot. A stock photo or familiar chip marking is not that association.
- Review applicable errata
Both densities fall under ES096. Check the relevant silicon revision and the limitations affecting your functions; do not assume a larger Flash option removes them.
- Audit the build and programmer
Keep the target, linker map, image checksum, programmer configuration and erase boundaries with the release. Check that saved calibration is preserved or deliberately re-provisioned.
- Test the field path
Include an update from the previous release, interrupted-update recovery, retained parameters and any supported downgrade. A clean initial flash is only one operating path.
- Release the alternate explicitly
Document which board and firmware versions accept each device. Link the incoming material record to that approval so a later purchase does not silently reverse the substitution.
Revision reference: ST ES096, medium-density device limitations. Match the marked silicon revision to the relevant errata entries. A revision ID is not a unique full-part-number or authenticity check; keep it connected to the offered device and lot evidence.
Send: the full manufacturer part number; required quantity and delivery date; tape-and-reel or other agreed packing; condition and traceability requirements; and whether alternates are prohibited or subject to engineering approval.
For a proposed density change: identify the approved original part and proposed replacement separately. Ask for a separate quotation line and retain your engineering acceptance criteria. Share only the technical information needed to resolve the sourcing question.
Send YURUNOX the full part number, quantity and delivery requirement. Include the packing and evidence you need to evaluate an offer. YURUNOX is an independent electronic-component sourcing partner; engineering approval remains specific to your product.
- Exact manufacturer part number and packing
- Quantity, destination and required date
- Traceability and inspection requirements
- Written rules for any proposed alternate
This guide combines manufacturer specifications, a public support case and clearly labeled engineering examples. It does not report YURUNOX laboratory measurements or customer shipment outcomes. Sources checked 5 September 2026; use the applicable current documentation for your release and offered lot.
- ST DS5319: STM32F103x8 / STM32F103xB datasheetRev 20 · Specifications, package and ordering-code fields.
- ST STM32F103C8 product page and STM32F103CB product pageOfficial device-family and orderable-variant references.
- ST PM0075: Flash memory programming manualRev 2 · Medium-density memory organization and Flash operations.
- ST Community: C8 Flash-size setting in STM32CubeIDE16 May 2023 · Original question and accepted manufacturer clarification.
- ST AN2594: EEPROM emulation in STM32F10x microcontrollersRev 3 · A documented two-page storage approach, not a product-specific validation report.
- ST AN2606: Introduction to system memory boot modeRev 70 · STM32F10xxx bootloader configuration, Table 45.
- ST ES096: Medium-density device limitationsRev 15 · Applicable limitations and revision identification.