What Is a Gate Driver? How to Select and Verify MOSFET Drive

Swipe to compare the decision conditions →

The controller decides; the driver moves charge

A microcontroller or PWM controller decides when switching should happen. The driver usually draws energy from a local bias supply and nearby decoupling capacitors, then provides a low-impedance path to charge or discharge the gate. The power supply feeding the load is a separate energy path.

For direct GPIO drive, check both components: the MOSFET's guaranteed resistance at the available V_GS, and the controller's permitted output current and output-voltage behavior. Absolute maximum pin current is not a normal design target. Also establish the gate state while the processor resets or its pin is high impedance.

A driver may provide useful input filtering, level shifting, isolation or undervoltage behavior, but those features are not automatic. Identify the requirement that direct drive fails before adding an IC.

How Does a Gate Driver Switch a MOSFET?

A MOSFET gate takes little steady-state DC current, but changing its voltage requires charge to move. Its internal capacitances are nonlinear: the charge needed depends on gate voltage, drain voltage and the operating point.

During a simplified hard-switched inductive turn-on, gate voltage first rises toward threshold. Drain current then builds. During the Miller interval, drain voltage changes substantially while gate voltage changes relatively little. Further charging brings the gate toward the intended on-state bias.

Q_g is total gate charge under specified test conditions. Q_gd, gate-to-drain charge, is useful for a first estimate of the current associated with the drain-voltage transition. Do not replace the complete transition with one fixed input-capacitance value, or assume every topology has the same plateau.

Faster switching can reduce the time with substantial drain voltage and current overlapping. It can also increase ringing, overshoot and electromagnetic interference. "As fast as possible" is not a complete switching specification.

Why Is MOSFET Threshold Voltage Not the Required Drive Voltage?

Threshold marks the beginning of conduction at a stated test current. It does not establish efficient operation at your load current. For an on-state switch, look for the resistance specification at the gate bias the circuit can actually deliver.

Swipe the table to compare test conditions →

A 3.3 V logic signal being above the typical threshold does not extend the 4.5 V resistance guarantee to 3.3 V. Likewise, the 28 A test condition is not permission to run any PCB continuously at 28 A. Temperature, copper area, package limits and cooling still matter.

During an alternate-part review, compare resistance at the available gate voltage, relevant gate charge and gate-voltage limits. Similar thresholds or a matching footprint are not evidence of equivalent switching performance.

How Much Gate-Driver Current and Drive Power Do You Need?

Separate current during a transition from average charge-related supply current. A driver is not a constant-current source, and a peak-current headline does not tell you how much current remains available throughout the Miller interval.

Why 0.5 A, 6 mA and 60 mW can all be correct

The first result concerns a short charge-transfer interval. The second averages repeated charging over a full switching period. The third estimates the associated energy demand from the drive supply. None describes the MOSFET's load current.

For a first resistive estimate during turn-on, available plateau current is roughly the driver voltage above the plateau divided by the total charging-path resistance. Include driver output behavior, external and internal gate resistance, and parasitic effects. Check the discharge path separately; source and sink capabilities may differ.

The TI gate-driver fundamentals report explains these charge and drive-path relationships. The UCC2751x datasheet, power-dissipation section also shows why gate-drive losses are shared by resistive elements. Add quiescent consumption and other internal losses when assessing supply capacity and IC temperature.

Do not approve a driver because its advertised peak current equals Q_gd/t. Verify output current at the relevant voltage, logic compatibility, pulse behavior, thermal limits and measured switching performance.

When Do You Need a High-Side, Bootstrap or Isolated Driver?

For an N-channel MOSFET, the controlling voltage is V_GS = V_gate − V_source. A gate at 10 V relative to ground provides only 1 V of drive if the source has risen to 9 V.

Illustrative voltage arithmetic, not operating recommendations. The actual source is a switching node, and all device and insulation limits still apply.

A high-side driver follows that moving reference. A high-side domain rating, such as the 600 V description of the UCC27714, is not a 600 V gate-drive amplitude.

A bootstrap stores energy; it does not create a permanent supply

In a conventional half-bridge bootstrap, a diode charges a capacitor while the switching node is sufficiently low. The stored charge then powers the floating high-side driver and charges the gate as the node rises. Bias current and leakage continue to discharge the capacitor during on-time.

1. 01 / RECHARGESwitch node lowThe bias source replenishes the bootstrap capacitor through the charging path.
2. 02 / DRIVESource risesThe charged capacitor supports the high-side output relative to the moving source.
3. 03 / BUDGETCharge is consumedGate charge, bias demand and leakage reduce the floating supply until it is replenished.

The simple relationship is voltage droop ≈ consumed charge / effective capacitance. TI's bootstrap design note includes gate charge, driver consumption and the UVLO boundary in capacitor selection.

A hypothetical 60 nC gate event plus 0.2 mA consumed for 1 ms requires 260 nC in this simplified model. With 1 µF effective capacitance, that is about 0.26 V of droop. At 10 ms, the same assumptions give about 2.06 V. These figures exclude additional losses and are not a capacitor recommendation.

Continuous high-side on-time needs an explicit supply solution. A bigger capacitor postpones droop; it does not remove the need to replenish charge. Check startup, maximum on-time, minimum recharge time, diode losses and effective capacitance under bias. Use a suitable charge-pump or independent floating supply when the operating states require it.

High-side is not the same as isolated

"High-side" describes switch position and reference. "Isolated" describes a barrier between circuit domains. An isolated driver can drive a low-side or high-side switch; a level-shifting high-side driver need not be galvanically isolated. Signal isolation also does not automatically provide output-side bias power.

How Do Gate Resistance, Layout and Dead Time Affect Switching?

An external gate resistor works with the driver's output impedance, the MOSFET's internal gate resistance and loop inductance. It influences charging speed, damping and loss. Separate source and sink outputs can permit different turn-on and turn-off resistors when the selected driver supports that arrangement.

The practical lesson is to treat driver, resistor, transistor and layout as one system. Keep the gate loop compact, place local decoupling close to the driver, and provide a low-inductance return to the MOSFET source. Where a Kelvin-source connection is provided, follow the device guidance rather than sharing a noisy power-current return.

Protection features need operating conditions, not just checkmarks

• UVLO: undervoltage lockout disables a driver below a defined supply threshold. Check whether the remaining permitted bias adequately enhances the chosen MOSFET.
• Dead time: allow both half-bridge switches to be off between transitions. Verify worst-case delays and real gate waveforms; two channels alone do not imply an interlock.
• CMTI: common-mode transient immunity describes behavior during rapid voltage movement across an isolation barrier. It is different from insulation withstand and working-voltage ratings.
• Miller clamp or negative bias: these can address unintended turn-on in suitable designs. Neither is universal, and negative gate voltage must stay within transistor limits.

A useful device-specific detail: the UCC21520 datasheet documents programmable dead time, but tying DT to VCC disables that function and permits output overlap. An advertised protection feature is not proof that the board has enabled it.

Establish what holds each switch off when the controller resets, the input disappears or either bias supply falls. Record any reliance on firmware, external pull resistors or sequencing circuitry.

How Can You Diagnose a MOSFET That Runs Hot at Higher PWM Frequency?

Possibly, but temperature alone cannot establish the cause. Consider a hypothetical motor-control board that works at low PWM frequency but heats more after frequency increases. Slow transitions are one possibility; conduction loss, diode recovery, load changes and cooling can also contribute.

In a simple hard-switching overlap model, P_overlap ≈ ½ V_bus I_load (t_r + t_f) f_s. Assuming 24 V, 5 A and 200 ns total transition time gives 0.24 W at 20 kHz and 1.2 W at 100 kHz. This illustrates frequency dependence only; it excludes conduction, capacitance, recovery and other losses.

Next ask whether actual V_GS, transition time and thermal behavior match the design. If the gate path is limiting switching, a driver or revised gate network may help. If it is already adequate, a larger current rating may not address the dominant loss.

Swipe the table for the evidence to collect →

Measure gate-to-source, not gate-to-ground by habit

A high-side measurement must reject a potentially large and rapidly changing common-mode voltage. Use appropriately rated differential or isolated equipment, with adequate bandwidth and common-mode performance for the circuit.

A waveform that looks clean is not proof that the probe is safe or correctly referenced.

Do not defeat oscilloscope protective earth or attach a conventional ground clip to a floating high-side node. Follow Tektronix's floating-measurement guidance and the equipment ratings. High-voltage or high-energy testing requires qualified personnel and approved de-energizing, discharge and connection procedures. This article is not a complete safe test procedure.

Record hardware revision, firmware timing, supply and load conditions, probes, measurement points and temperature. After a driver or layout change, repeat startup, shutdown, peak-load and fault-state checks rather than relying on a single room-temperature waveform.

Which Gate-Driver Specifications Must Match the Power Stage?

Start with the MOSFET and topology, then work outward to bias, timing, logic and protection. These three TI devices illustrate different architectures; they are not interchangeable-part recommendations.

Swipe to compare the three driver examples →

Peak drive current is a short-duration capability under datasheet conditions, not continuous output current or the load rating. Compare source and sink characteristics at the intended supply, not only numbers in product titles.

What Evidence Should Be Included in a Gate-Driver RFQ?

Send the operating conditions that control electrical compatibility, not only a generic function or package. The following evidence lets a sourcing team compare an exact requested part with a proposed alternate without treating a matching footprint as design approval.

1. Transistor and gate requirementsExact MOSFET part number and revision, required on/off bias, relevant Q_g/Q_gd conditions and transition targets.
2. Power-stage architectureLow-side, high-side or half-bridge arrangement; channels; switching-node range; isolation requirements.
3. Operating statesFrequency, duty-cycle range, maximum on-time, recharge time and available bias supplies.
4. Control and protectionLogic levels, input polarity, enable state, worst-case delays, dead time, UVLO and startup/fault behavior.
5. Physical and sourcing requirementsPackage and pinout, temperature grade, thermal constraints, quantity, delivery schedule and traceability documents.

Treat a proposed alternate as a design change until engineering has approved it. A pin-compatible replacement can still change switching behavior, bias requirements or off-state protection. Mark unresolved requirements explicitly rather than filling them with assumed values.

For component sourcing context, see YURUNOX's Texas Instruments page and quality-assurance information. Part availability and suitability must be confirmed for the actual enquiry.