YURUNOX · FPGA identification, qualification, and sourcing control

Altera FPGA Ordering Code Guide

An Altera ordering part number is a family-specific engineering configuration, not a universal string. Preserve every character, choose the decoder for that exact family, and then prove the complete code against the product page, package and pin files, Quartus support, lifecycle, and traceability evidence.

The board name is not the device OPN Altera DE2 FPGA development board with the FPGA and surrounding interfaces visible
Development-board context only—the board code and the mounted FPGA ordering code are separate purchasing records. Photo: Paulo Matias (Thotypous), CC BY-SA 3.0, via Wikimedia Commons.

The short answer: decode twice

Pass one explains the fields. Identify the FPGA family, open the official decoder for that generation, and segment the code using that diagram—not a decoder copied from another family. Pass two proves the orderable device. Match the entire string to an official product record and validate the package, pinout, performance, temperature, optional suffix, software, lifecycle, and supply path.

Release rule: if one character changes, treat the proposal as a different component until engineering, quality, manufacturing, software, and supply-chain reviewers approve the consequences.
RULE 01

Keep the full string

Do not drop a final letter because it resembles a packaging note. Suffix meanings are family-specific.

RULE 02

Start with the family

Agilex 7, Agilex 5, Arria 10, Cyclone IV, Cyclone V, and MAX 10 do not share one field map.

RULE 03

Prove the exact OPN

A distributor search result can help locate stock, but it does not replace the manufacturer product record.

First classify the identifier you have

The most expensive decoding mistake often happens before the first character is interpreted. Several identifiers can appear in the same datasheet, board guide, label photo, or Quartus project.

Five identifiers that should not share one BOM field
IdentifierWhat it is forControl needed
Device OPNThe exact manufacturer ordering part number, such as AGFB014R24B2E2V.Place the complete verified string on the AML, purchase order, and inspection plan.
Family nameA group such as Agilex 7 F-Series, Arria 10 GX, or Cyclone V SoC.Use it to find documentation; never purchase from the family name alone.
Development-kit codeA board OPN such as DK-SI-AGF014EB.Keep it separate from the FPGA mounted on the board.
Quartus selectionA software device name or supported-device grouping.Use it to prove compilation and pin assignment, then reconcile it to the orderable OPN.
Top marking / trace dataDevice-marking lines, date or lot data, and assembly trace identifiers.Capture every visible line and compare it with packing labels and trace documents.
Close-up of an Altera Cyclone II FPGA package showing its top-side marking
Generic marking example—not the worked OPNs in this guide. Photo: Reubentg, public domain, via Wikimedia Commons.

A photo is evidence, not a decoder

A device photo can expose a mismatch or an unexpected suffix, but glare, laser-mark contrast, font conventions, and shortened markings make reconstruction risky. Prefer the released BOM and original labels; use the photo to corroborate them.

Receiving trigger: quarantine material when the top mark, inner label, outer label, certificate, and approved OPN do not reconcile character for character.

The concepts repeat; the character positions do not

Most Altera codes carry a family or generation, a variant or series, a member or density, a package, a performance option, a temperature class, and sometimes a suffix. That shared logic is useful for planning. It is not permission to reuse character boundaries.

01Family & generation
02Variant, series, or fabric
03Member, tiles, and package
04Speed, power, and temperature
05Suffix and silicon status
Where the decoding boundary changes
Family exampleTypical structureSafe boundary
Agilex 7Family, series, fabric specification, density, package code, tile speed, temperature, core speed/power, suffix.Package and tile information are tightly coupled; use the current decoder and product table.
Agilex 5D-Series and E-Series use family-specific current OPN diagrams.Use the current series decoder; production definitions can expand as the family matures.
Arria 10 / Stratix 10Family, variant/member, device option, package, performance, power, temperature, suffix.Use the exact catalog record to distinguish complete codes sharing a member and package line.
Cyclone IV / VFamily/variant, member, transceiver or hard-IP option, package, temperature, speed, suffix.The same letter can mean different things at different positions or generations.
MAX 10MAX 10-specific density, feature, package, temperature, and speed structure.Special grades may need additional Quartus and sales confirmation.

For a portfolio-level comparison before decoding, see the YURUNOX Altera sourcing page. It can help frame the family and supply question, but the manufacturer’s family documentation remains the technical authority.

Documented manufacturer example · reviewed 28 August 2026

Agilex 7: AGFB014R24B2E2V

Altera’s exact product record identifies this string as an Agilex 7 F-Series 014 device in the R24B product line. The current page also records 2,486 pins, FBGA package, tray shipping media, moisture-sensitivity level 3, and an “In Production” lifecycle status at the review date. Those facts are not safely recoverable from “Agilex 7 014” alone.

AGfamily signature Fseries Bfabric specification 014density R24Bpackage code 2tile speed Etemperature 2core speed / power Voptional suffix

The segmentation comes from Altera’s Agilex 7 decoder. The meaning still has to be proved with the family plan, package and pin guide, datasheet, and the exact Quartus target. For example, R24B is not just a body-size hint; it is the package option engineers must use to validate available tiles, I/O, ball map, PCB data, and memory-interface choices.

What the decoder answers

Where the family, series, density, package, tile speed, temperature, core speed/power, and optional suffix sit.

What it does not answer

Whether the design fits, timing closes, required transceivers are bonded out, power is adequate, or the proposed supply is authentic.

Decision consequence: the exact product page and decoder support the OPN’s identity. They do not authorize a board release or substitute by themselves.

Legacy codes are readable—when you use the legacy map

The Cyclone IV handbook gives a clear teaching example: EP4CGX30CF19C7N.

EP4CCyclone IV GX3-Gbps variant 30member code C4 transceivers FFineLine BGA 19324-pin option Ccommercial TJ 7speed grade Nlead-free suffix

This one code exposes three traps. The first C after the member code describes transceiver count, while the later C describes the commercial junction-temperature class. F is the package type, while 19 selects the associated 324-pin option. The final N means lead-free for this family—but must not be generalized to every newer Altera code.

Illustrative sourcing scenario · not a claimed customer event

“Same EP4CGX30” is not enough

A broker offers an EP4CGX30 device with a different package or suffix. The prefix matches, the quoted logic family sounds right, and the price is attractive. The safe decision is still “hold”: compare the full OPN, package drawing, ball map, transceiver option, temperature, speed, suffix, Quartus target, and lifecycle evidence before price enters the approval.

Which fields can change the design?

Variant, series, or fabric

May separate FPGA-only and SoC devices, transceiver capabilities, hard memory controllers, security features, or tile arrangements. Verify the functional block—not the prestige of the family name.

Member or density

Is a device-member shorthand, not a universal logic count. Check ALMs or LEs, RAM by block type, DSPs, PLLs, hard IP, I/O banks, and scarce resources. Run a representative compile.

Package and pin option

Controls footprint and ball map and can change usable I/O, transceivers, memory interfaces, thermal behavior, migration paths, pin count, MSL, and shipping media.

Speed, tile speed, and power

A digit is not comparable across unrelated families. Newer parts may separate tile speed from core speed/power. Close timing and power with the exact Quartus device setting.

Operating temperature

Record the numerical junction-temperature range and applicable derating. A temperature letter is not enough, and ambient temperature is not junction temperature.

Optional suffix and silicon status

May control material, engineering-sample status, security, provisioning, power behavior, shipment, or another option. Preserve it and verify its meaning in the correct family document.

The package is an electrical choice

“FBGA” describes a broad package type, not a released footprint. The complete package code must lead to the correct body dimensions, ball pitch, ball map, pinout, migration constraints, thermal data, MSL, and assembly controls.

The Arria 10 record for 10AX115N2F40E2SG, for example, identifies an FBGA device with 1,517 pins, tray media, MSL 3, and “In Production” status at the review date. A quote that says only “Arria 10 GX 1150, F40” is incomplete.

Cross-sectional diagram of a BGA package showing the die, interposer, and solder-ball connections
Generic BGA cross-section—not an Altera package drawing. Diagram: Tosaka, CC BY-SA 3.0, via Wikimedia Commons.
Special-grade example: Altera’s MAX 10 ordering page says the –A6 speed grade is not available by default in Quartus Prime and directs users to local Altera sales support. A syntactically plausible code can therefore require software and commercial confirmation.

A 7-step OPN approval workflow

Capture the source string

Store the full manufacturer code as text. Preserve punctuation, spaces, suffixes, and any ES or sample indicator in the evidence copy.

Identify the exact family

Use an official family overview or product table. Do not infer the generation from the density number alone.

Open the current family decoder

Record the document title, revision or current-page date, and URL. Segment only after choosing the correct family map.

Match an exact product record

Confirm that the complete OPN exists. Capture lifecycle, package/manufacturing attributes, and any official material information.

Prove electrical and mechanical fit

Review the product table, datasheet, package drawing, pinout, PCB files, device migration guidance, and thermal/handling data.

Prove software and silicon status

Select the exact device in the approved Quartus edition/version. Review known issues, errata, ES restrictions, and programming/provisioning effects.

Close lifecycle and supply controls

Check PCN/ADV/PDN coverage and the authorized channel. Add chain of custody, inspection, and risk-based test requirements when the supply path is non-authorized.

Quartus is part of the component decision. Altera’s current edition comparison places the newest Agilex families, Stratix 10, Arria 10, and Cyclone 10 GX in Pro Edition support, while Standard and Lite cover different mature or cost-optimized device collections. Confirm both edition and version; then freeze the device files, IP versions, and programming environment with the released build.

Interactive evidence builder

What should you verify next?

This tool does not decode an unknown part number. It creates the next evidence path based on the identifier and change you are reviewing.

Start with the exact string

Select the evidence you have and the field that changed. The result will name the records that should block or release the review.

Build an RFQ that engineering can approve

Keep the complete OPN as its own field. Put manufacturer, internal part number, description, lifecycle, and controlled alternates in separate fields so ERP normalization cannot silently merge different configurations.

Minimum FPGA RFQ and receiving record
FieldRequired evidenceRelease question
Full manufacturer OPNExact Altera product page or current OPN list.Does every character match the approved BOM?
Resources and variantFamily plan, product table, and representative Quartus compile.Are logic, memory, DSP, HPS, hard IP, and tile resources sufficient?
Package and pin countPackage drawing, pinout, PCB footprint, and migration file.Is the ball map identical to the released design?
Performance and temperatureDatasheet and exact Quartus device setting.Do timing, power, and junction-temperature limits fit the mission profile?
Suffix / silicon statusFamily decoder, product record, known-issue and errata review.Is it approved production silicon with the required features?
Software supportQuartus edition, version, device files, IP versions, and reproducible build.Can the released configuration be compiled and programmed?
Lifecycle and supplyCurrent product status, PCN/ADV/PDN review, supplier authorization, chain of custody.Is the source appropriate for production life and counterfeit risk?
Handling and traceabilityMSL, floor life, shipping media, labels, lot/date data, and receiving photos.Can receiving and assembly control and trace the material?
Illustrative approval scenario · not a claimed YURUNOX shipment

A one-character change after a last-time-buy search

A sourcing team finds a code that differs only in temperature or suffix from the released OPN. The code may be genuine and orderable, yet still fail the application’s thermal, timing, security, provisioning, or qualification requirements. The team should open a controlled alternate request, not overwrite the original MPN. Price and lead time are evaluated only after the new code passes the technical checklist.

YURUNOX is an independent electronic-component sourcing partner, not the FPGA manufacturer. For an exact-part review, provide the full OPN, label and device photos, required quantity and schedule, package/footprint, application temperature, Quartus edition/version, lifecycle target, and traceability requirements. Our quality-assurance process explains the evidence controls, and our purchasing experience page provides the sourcing contact path.

Frequently asked questions

Is there one universal Altera FPGA part-number decoder?

No. The field concepts repeat, but their positions and meanings vary by family and generation. Use the official decoder for the exact Agilex, Stratix, Arria, Cyclone, or MAX family.

What is the difference between an OPN and a device family name?

A family name describes a product group. The ordering part number identifies one orderable family member, package, performance and temperature combination, plus any applicable options. Procurement needs the full OPN.

Does a lower speed-grade number always mean a faster FPGA?

Not across every Altera family. Speed conventions are family-specific, and newer devices can separate tile speed from core speed and power. Verify the applicable datasheet and exact Quartus device.

Can I substitute the same FPGA density in another package?

Not without engineering change and qualification. The package changes the footprint and ball map and can change I/O, transceiver, memory-interface, thermal, and migration availability.

What does ES mean on an Altera FPGA?

ES commonly identifies engineering-sample material in families that use that indicator. Confirm the exact family document. ES devices can have different errata, support, timing, or qualification and are not production equivalents by default.

Why can the distributor code differ from my Quartus device name?

The distributor record may contain a complete orderable suffix while Quartus presents a normalized selection name. Reconcile both to the official product record and family decoder; do not edit either string until the relationship is documented.

How do I verify that an Altera FPGA is still in production?

Check the exact official product page and the current PCN, advisory, and PDN collection, then obtain current confirmation from Altera or an authorized distributor. Family-level availability does not prove every OPN is active.

What should I send for an FPGA sourcing review?

Send the complete OPN, clear label and device photos, quantity and schedule, application and temperature requirements, released package/footprint, Quartus edition and version, lifecycle target, traceability requirement, and whether substitutes are allowed.

Technical sources

Manufacturer records below were reviewed on 28 August 2026. OPNs, software support, lifecycle, known issues, and distribution channels can change; reconfirm the exact device before design release or purchase.

  1. Altera — Agilex 7 Part Number Decoder.
  2. Altera — AGFB014R24B2E2V Product Details.
  3. Altera — 10AX115N2F40E2SG Product Details.
  4. Altera — Cyclone IV Device Handbook.
  5. Altera — MAX 10 Device Ordering Information.
  6. Altera — Quartus Prime Edition Comparison.
  7. Altera — Latest Quartus Version for Device Support.
  8. Altera — Product/Process Change Notifications.
  9. Altera — Contact and Authorized Distributor List.

Editorial independence: YURUNOX is an independent sourcing partner. Altera, Agilex, Arria, Cyclone, Stratix, MAX, and Quartus are trademarks of their respective owners. Product-page status and source availability are snapshots, not guarantees of stock or future lifecycle.

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